Volume 01: Rethinking Scale
Welcome to the first volume of 'Engineering Notes from the Quantum Frontier' – a window into the craft and engineering insight behind Universal Quantum’s journey to building truly scalable, fault-tolerant quantum computers. In each instalment, we unpack the details of our modular architecture, highlight progress on our proprietary ion trap chips, and walk you through some of the design choices behind the hardware and software stack that underpin our technology.
A Matter of Scale
Quantum computing has reached a critical point in its evolution. The challenge is no longer just about demonstrating quantum advantage, but about building machines that scale effectively while maintaining performance. The industry often gravitates to qubit counts as a metric of progress, but what matters equally – and perhaps more – is the fidelity of those qubits, and the overall architecture's ability to scale without compounding system error or engineering complexity. Moreover, the scaling must happen at pace to return tangible utility in a reasonable timeframe. It is not enough to incrementally add qubits; rather, the industry needs to accelerate to millions of qubits in a high fidelity system.
At Universal Quantum, our response to this challenge is a modular trapped-ion approach. This design paradigm, rooted in robust physics and meticulous engineering, allows us to build systems with a clear path to rapid scaling. It is not just about making quantum processors larger – it is about making them better, more stable, and more practical as they grow.
The iQPU Approach
At the heart of our platform lies the integrated Quantum Processing Unit – or iQPU. This module encapsulates all the subsystems necessary for quantum computation: our proprietary silicon ion trap, signal delivery systems, optical access, shielding, and control electronics. Each iQPU is a standalone high-fidelity module, engineered to be linkable to others, and operated as part of a larger unified quantum computer. The philosophy behind the iQPU is rooted in modularity. By isolating and standardising the unit of computation, we reduce the engineering burden of scaling and open up a path to production-ready systems that can be rapidly manufactured and expanded systematically.
Fast Connections, Real Modularity
One of the key barriers to real modularity is communication between modules. Without fast, reliable links, modular systems risk becoming conceptually elegant but practically fragile. Our system architecture relies on ultrafast, deterministic links between iQPUs. These are matter based links where trapped ion qubits can be physically shuttled from one module to the next at high speed, and without loss of fidelity or a need to transfer quantum information to a new interface2. This requires engineering precision and consistency in the manufacture of our modules. Fortunately, these requirements are readily achieved in existing supply chains, drastically simplifying and reducing the cost of enabling this technology. This level of performance, where inter-module operation speed and fidelity do not limit algorithmic throughput is what distinguishes real modularity from modularity in name only. It also creates the foundation for long-range connectivity across qubits – enabling performant quantum error correction – a critical requirement for any fault-tolerant architecture.
Engineering Inside the Chip
Our silicon ion traps are fabricated using well-established microfabrication processes, tuned specifically for our needs. The chips are designed to maintain long qubit coherence times, reduce motional heating, and support precise ion control across operational lifetimes. Each generation of chips is iterated on using feedback from system-level performance. The ability to design our own chips in-house, then manufacture at a commercial semiconductor fab, ensures that we can adapt quickly, optimise consistently, and move toward manufacturable systems that scale with confidence whilst avoiding the costly overheads of running or operating our own fab.
The Role of the ASIC
A central bottleneck in scaling quantum computers lies not in the quantum layer itself, but in the classical infrastructure needed to control it. The cabling, electronics, and timing required to drive millions of qubits can quickly become unwieldy. Our solution is a custom-designed ASIC – an Application Specific Integrated Circuit – that integrates directly into each iQPU. The ASIC handles qubit control commands at scale, significantly reducing wiring complexity and improving system reliability. It is a core part of how we intend to automate and industrialise quantum system deployment in the future.
The Software Stack
Quantum computing does not stop at hardware. The software that orchestrates and manages a quantum system is equally important. At Universal Quantum, we are building the full stack in-house. From pulse-level schedulers to high-level compilers, our control software is designed specifically for modular computation. This software will allow for mid-circuit measurement, error decoding, and adaptive control – all required to implement quantum error correction in real time. It will also serve as the integration layer between classical compute infrastructure and the quantum backend, enabling hybrid algorithms and future cloud deployment.
The Road Ahead
What we are building is not just a device – it is a platform. A quantum computing architecture that can evolve across generations while maintaining coherence, reliability, and manufacturability. The iQPU is the atomic unit. But as we combine them, test them, and layer in error correction, the system matures into a full-scale universal quantum computer that can rapidly reach impactful scale while maintaining performance. Future volumes of Engineering Notes will explore specific subsystems in more depth. Our journey is one of engineering clarity. We invite you to join in the dialogue, track our progress, and help define what scalable quantum computing should truly look like.
